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Technical features
Fourfold Multi Hit DLD
● 4-quadrant meander2) delay line detector with 87 mm chevron MCP stack
● UHV design, fitting to CF 150 flange diameter
● Active detector area of 60 mm x 60 mm (30mm x 30mm per quadrant). Different sizes
available on request.
Note: There is a blind gap of < 1mm between the quadrants (see fig. above) which will appear as a “blind” cross
structure within the images.
● Up to 4003) pixel for 60 mm detection length with standard readout system
● Up to 1200 pixel (for 60 mm detection length) possible with 4-fold TDC system (device is
currently under development and will be available in summer 2009)
● Real parallel detection of 4 hits without any deadtime due to the fourfold design
● A multi hit resolution of 10 ns per quadrant with a 32-fold memory depth allows theoretically a
detection of up to 128 hits each 320 ns using the four independent quadrants in parallel
(corresponds to 400 MCPS, only valid for bursts with long deadtimes in between, not
reachable in continous operation)1).
● The multi hit resolution of the single quadrants (10 ns each) is always unambiguous due to
the layout with a single delay length of approx. 9 ns each. This also avoids data redundancy
problems completely.
● Linear response due to single event counting
● Extremely low dark count rate for each quadrant: < 5 cps
Analog Readout Electronics
● 4 independent 4 channel pulse processing units (preamplifier and
constant-fraction-discriminator, CFD walk < 50 ps, frequency for pulse convertion > 150
MHz).
Time-To-Digital-Converter
● Time measurement via 16 channel time-to-digital-converter (TDC) with
- internal reading rate of 80 MHz
- 17 bit time measurement depth
- 32-fold memory depth for multi hit recognition for each channel with pulse distances of min.
5.6 ns
- Time bin resolution: 82 ps (time resolution < 250 ps possible using rayleigh criteria on
statistical distributions measured on the same image position)
- FPGA based data processing (calculations of time sums and differences), parallelized for
the 4 quadrants
- 2 MByte FIFO for data transfer to USB controller
Data readout and Software
● Data readout to PC via USB 2.0 driver for Windows® systems
● USB transfer rate: 32 MByte/s (max.), 28 MByte/s (typ. value for continous operation).
Depending on the application 2 Byte per event are minimal required for data transfer.
● Stand-Alone DLD monitor software
● Software DLL with user interface description for detector readout by external software
● LabView® VI interface available
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